Document
AIAA-92-4113-CP
THE DEVELOPMENT OF AN AIRBORNE INFORMATION
MANAGEMENT SYSTEM FOR FLIGHT TEST
Glenn Bever• NASA Dryden Flight Research Facility P.O. Box 273 Edwards, California 93523-0273 Abstract NASA National Aeronautics and Space Administration An airborne information management system is be- printed circuit PC ing developed at the NASA Dryden Flight Research state of the PCM pulse code modulation Facility. This system will improve the art in managing data acquisition on-board research air- RAM random access memory craft. The design centers around highly distributable, surface-mounted device SMD that allow data compres- high-speed microprocessors and real-time analysis. This pa- STD standard sion, digital filtering, the areas of applicability, approach to per describes VME virtual memory extension system, potential for trouble areas, and developing the reasons for this development activity. System archi- Introduction tecture (including the salient points of what makes it unique), design philosophy, and tradeoff issues are also Modern aircraft have become extremely complex sys- discussed.
tems vehicles. Instrumenting such aircraft for flight test and research is no longer a matter of applying a Nomenclature few sensors and connecting them to a pulse code mod- ulation (PCM) system. On-board computers for cock- A-D analog to digital pit display, navigation, and flight control have added AICS airborne instrumentation computer hundreds of parameters to the classic instruments ex- system amined in a flight-research activity.
AIMS airborne information management In the flight-research data-acquisition process, flight system data requirements and sample rates are increasing. On CPU central processing unit the other hand, allowable bandwidths for real-time- DFRF Dryden Flight Research Facility transmitted data are fixed.
DPRAM dual-ported random access memory With more channels of data being of interest and higher sampling rates required, methods of compress- EPROM electrically programmable read-only ing or preprocessing data on board the aircraft would memory greatly enhance the data-acquisition process. In addi- Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 input-output I/0 tion, the increase of avionic suites on small aircraft has MIL-STD military standard made space a premium for add-on instrumentation sys- tems. Minimizing the intrusion of wiring inside aircraft mini-TAICS minitransputer airborne instrumenta- saves wiring time and keeps the structural integrity in- tion computer system tact. Distributing the system, allowing for fault toler- ance, and placing systems in harsh environments have •Electronics Engineer.
also become important issues.
Copyright @1992 by the American Institute of Aeronau- tics and Astronautics, Inc. No copyright is asserted in the information involves col- Managing flight-research Govern- United States under Title 17, U.S. Code. The U.S.
lecting, filtering, and storing data in a form that can to exercise all rights under ment has a royalty-free license be retrieved and correlated. This filtering includes the copyright claimed herein for Governmental purposes. All the copyright owner. hardware and computations. Management of several other rights are reserved by hundred parameters is common on research aircraft. activities include flight control, cockpit display, and Such management could require significant amounts of other avionic systems interaction.
real-time processing at high rates.
Hardware Often, making decisions about data before trans- After a survey of current and projected flight- mission is more appropriate than processing the data research requirements, the basic design goals for a new upon reception; therefore, processing the data on board system were formulated. The AIMS was envisioned the aircraft before transmission is preferable in many as a multiprocessing system whose processing nodes cases. If, for example, the data have not changed, then could be collocated or distributed throughout the air- there is no need to retransmit. This example repre- craft. This system should be small and modular so sents a simple form of data compression. If a high- that the physical size could reflect the processing and frequency signal must be analyzed in real time and the input-output (1/0) requirements. The smallest foun- transmission bandwidth is limited, then analyzing the dation set should fit in one hand for ease of use in small data before transmission can reduce the transmission areas and function in harsh vibration and temperature bandwidth requirements. This on-board data compres- environments, such as engine bays or hypersonic vehi- sion makes more transmission bandwidth available for cles.
other parameters. On-board computation also allows for other types of data enhancement, such as improving The circuit boards should be large enough to accom- transmission integrity by computing cyclic redundancy modate reasonable circuit designs and avoid forced use codes, CRC, before transmission. of hybrid circuits. These boards should also be small enough to achieve maximum volume savings. If the This paper describes an airborne information man- module cases were too small, then hard-to-work-with agement system (AIMS) being developed at the NASA connectors would be required, thus necessitating the Dryden Flight Research Facility (DFRF). The design building of connector blocks. In other words, after a goals and basic architecture as well as the develop- minimum size, diminishing returns are seen by shrink- ment approach are discussed. In addition, electronic ing the system further.
design and fabrication issues, heat transfer considera- tions, mechanical connections, and programmable sig- A survey of the industry revealed that no satisfac- nal conditioning are presented. Current and poten- tory system existed. Industry standards, such as the tial applications for this system are discussed. Lessons virtual memory extension (VME) bus, were considered learned are reviewed. too large. Indeed, the system to be replaced, the air- borne instrumentation computer system (AICS), was System Design Goals and Basic smaller than the VME system. Developed at DFRF, Architecture the AICS uses the standard (STD) bus and is too large for many applications. Instrumentation systems com- The main thrust of this development project is to mercially designed for flight test were becoming in- improve the state of the art of on-board acquisition, creasingly modular, but none planned to use the pro- processing, storage, and transmission of research air- cessor as the controlling element for the acquisition pro- craft data. To avoid repeating the whole development cess. When the goal is to manage rather than simply process every few years, attention must be paid to acquire data, this processor control is important.
the system architecture; therefore, a top-down solution Weighing these concerns, a module form size was de- was designed. Initially, this solution considered all the signed (Fig. 1). Note that the system is modular. If things that were desired for the system to do. Lack a "logical" block or computational node requires more of technology and resources forces a temporary scaling modules than will fit into a given area, the architecture down of the implementation. If, however, the architec- allows the logical set to be divided into smaller blocks ture is considered adequately, technology advances will Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 for placement in convenient areas (Fig. 2). Keeping allow an increase in system capability without requir- analog sensor leads as short as possible to reduce the ing an architectural urban sprawl or unplanned expan- noise pickup is desirable. For this reason and to mini- sion paths.
mize the quantity of wire bundled throughout the air- In considering the architecture of the system, key craft, placing parts of the system in each wing, in the issues that are not directly or traditionally concerned tail area, in the avionics bay, or in the engine compart- with data acquisition for research purposes were kept in ment may be desirable.
mind. These issues included on-board data processing, Connectors will be used that are easy for instrumen- fault tolerance, and artificial intelligence. Also, sepa- tation crews to grasp, connect, or disconnect or to in- rate from instrumentation issues, any on-board activity sert and remove pins. This requirement is a practical that requires high-speed computation could use the in- herent computational abilities of the system. These • Built-in floating point processor limitation in how small the modules can be (Figs. 1 and 2).
• Multiprocessing architecture Software • On-chip, high-speed random access memory us- Simultaneous or quasi-simultaneous sampling (RAM) ing high-speed analog-to-digital (A-D) converters will 5 MHz for whole processor be used to minimize time skewing of sampled data. • Single clock speed of Enough on-board processing power will be available family if necessary, to per- through multiprocessor expansion, • Internal operating speeds from 10 to 30 MHz form such high-speed computations as digital filtering, data compression, and display formatting.
standard ideas about data In addition to challenging The AIMS will be remotely programmed, so com- collection, the AIMS project required new techniques plete system reprogramming can occur without remov- it to fruition. For example, and technologies to bring ing or opening the hardware. Analog channels, filters, and liquid cool- use of surface-mounted devices (SMD) excitation voltages, and amplifiers will also be remotely ing was needed. Sealing of modules because of liquid programmable. Such programming will also avoid re- cooling and use of heat-transfer devices in aircraft that moving or opening the hardware.
have no cool spots (hypersonic) had to be addressed.
Plans include a ground-based workstation to allow A completely software programmable system was re- the flight systems engineer to describe, in a high level quired because there is little room for and no access to parts while the system is on the aircraft. In fashion, what the system will do. The system would internal addition, an artificially intelligent front end for system work out the implementation details and report back configuration was required.
the optimal configuration.
The AIMS will also write, time-tag, and format engi- Electronics Design and Fabrication on-board storage sys- neering unit data to memory or Issues tems. Such data would be appropriately compressed before storage or transmission. For example, vibra- Because of the size and complexity of the modules, tion analysis systems that require frequency modula- techniques must be explored to reduce the size of the tion systems to report safety of flight structural modes circuits. Two techniques are available: hybrid circuits be acquired in a sampled mode and pro- could instead and SMD. Hybrids allow for the increased circuit den- cessed on-board. The frequency domain results could sity but require higher skill, higher cost, and more spe- be transmitted through PCM at a considerable reduc- the cialized and expensive tools. In the initial stages of tion of bandwidth.
project, SMD will be the predominate technique used, except where appropriate commercial hybrids can be Development Approach found.
the beginnings of the architecture were formu- Once slightly larger than a credit Each circuit board is an appropriate microprocessor for lated, a search for central processing unit (CPU) card. Figure 3 shows the basic criteria were the core of the system was done. The board. The SMD components are mounted on both microprocessor to be a single chip solution, be for the sides of the board. This size allows some standard physically small, have built-in serial communications, dual in-line packaged integrated circuits to be used but and provide high-speed processing.
forces most of the logic to be surface mounted or hy- brid.
A decision was made to center the architecture around the transputer TM family of microprocessors.
In addition to the physical desirability of building notable features Transputers have several desirable and Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 small systems, another reason is electronic. When deal- envisioned en- that allow them to function well in the ing with high-speed logic, smaller wiring runs cause vironment. These features are listed below.
fewer problems because of time skewing and reflections.
To minimize heating problems and conserve power, • Single-chip microcomputer low-power complementary metal-oxide semiconductor • Minimum number of support chips required parts are used wherever possible. High-speed logic is important to AIMS. The extremely fast machine cycle • High-speed processor-to-processor serial links time of the transputer (~ 25 nsec) requires that sup- port logic have very small gate delays. The advanced • Operating speed of 10 million instructions/sec complementary metal-oxide semiconductor technology Transputer® is a registered trademark of INMOS Corpo- logic family is characterized by low power consumption ration, Colorado Springs, Colorado.
than they would was chosen as the peratures are more tolerable in fluid as well as high speed - and thus which has a be in air. Fluorinert compound FC-72™, backbone of the logic systems.
boiling point at one atmosphere of 56 °C, was selected.
Considerations Heat Transfer parts have a temperature Most nonmilitary specified 70 °C. In a nonpressurized system range extending to Conventional The SMD introduces some problems.
of pressure, the temperature of the at one atmosphere heat transfer through metal methods of conductive FC- 72 fluid could not exceed 56 °C.
rails cannot be applied because the geometry of SMD the AIMS, The AIMS must be a closed system because decreas- will not permit it. The targeted locations of the boiling point ing ambient pressure would depress remote locations and harsh environments, make con- heat transfer. As in many and, therefore, lead to less efficient vective and forced air cooling impractical the temperature elevates in the closed system, pres- cases.
the boiling point. To min- sure increases and elevates The potential for placement in remote locations and the closed system and keep imize pressure increases in the circuit density of the harsh environments and at an acceptable level, fluid expan- the boiling point to explore a technique used boards caused a decision sion is allowed by including a volume of compressible by supercomputers - liquid cooling. Using a colorless, gas. The volume of trapped gas required de- trapped nontoxic, electrical noncon- odorless, nonflammable, pends on the expected ambient temperature range and the electronics can lit- ductor fluid called Flourinert™, power dissipation inside the AIMS.
in liquid to facilitate heat conduction.
erally be bathed Figure 4 shows an end view of a module, including Liquid cooling has three notable advantages. First, holes. In sys- the sealing area and the Fluorinert flow this approach allows direct heat conduction from all fluid, these in- tems that require active pumping of the system can be parts. Next, temperatures inside the the conduits for circulating the fluid.
ner holes provide heat limited to a predetermined boiling point. Lastly, If a processing task is required in a nonharsh envi- this system by one of three meth- can be removed from ronment, then a module can probably be used without ods. Conduction through the case to a mounting sur- liquid cooling. Others examined the thermodynamic the first and most commonly used method.
face will be 3 5 issues involved. - In high-temperature environments, liquid can be piped to a heat exchanger. This method works much like a Mechanical Connections radiator in a car. In severely high-temperature envi- ronments, liquid can be piped to a stearate compound to connect the modules.
Figure 5 illustrates two ways that absorbs heat by changing phase. This method al- Power stack (a) shows two electronics modules, labelled lows heat exchanges when no cooler environment exists module and analog module, which share CPU/analog to pipe the heat to, such as in hypersonic vehicles.
the same internal power module and local bus (c). Four CPU board liquid-cooling approach boards are on local bus (c). One transputer As a disadvantage, the of the AIMS unit. Be- is used for each local bus. Note that power stack (a) greatly complicates construction and to the expansion to is connected to a pump module ing a modular stack, the AIMS requires each section be used to pump fluid the adjacent module. This modules. These modules would make a good fluid seal with requirement to remotely through the stack and allow for thermal expansion of modular stack also drives the units because separating the modules is the fluid in harsh environments. Power stack (b) shows program the board and a military stan- The liquid, which is heavier a single module with a CPU apt to be troublesome.
the system and is amenable dard (MIL-STD) 1553 interface board making up local than water, adds weight to and insulation. As a re- bus (d). Unlike power stack (a), module (b) derives to wicking up between wires to the proper sealing of power from a source external to the stack and requires sult, attention must be paid no special cooling. Figure 6 shows the assembly of a connectors.
Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 single module containing two circuit boards.
of AIMS in the This technique allows operation of applications, while allowing use of widest range Conditioning Programmable Signal parts which do not meet military temperature-ranged the largest phys- specifications in extreme temperature environments. In most instrumentation systems, than five signal conditioning. These electronics Thermal transfer coefficients in fluid are more ical part is the the sensors and convert the signals to a times higher than that of air, so higher ambient tern- tie directly to the data collection system. The signal- form useful to is a registered trademark of Minnesota Mining Fluorinert® conditioning electronics contains presample filtering, and Manufacturing Company, St. Paul, Minnesota.
Recent signal-level shifting, and bridge completion.
is a registered trademark of Fluorinert compound FC-72® possible to commercial developments have made it Paul, Minnesota Mining and Manufacturing Company, St.
shrink these important tasks onto a few programmable Minnesota.
chips. A circuit board has been designed to provide MIL-STD-1553 data. The existing on-board acqui- general-purpose, multichannel, end-to-end signal con- sition system could not handle another MIL-STD- ditioning for many sensors. The basic design rep- 1553 interface, so an AICS with the mini-TAICS and resents a significant enhancement of existing signal- transputer MIL-STD-1553 interfaces was incorporated.
conditioning techniques commonly in use at DFRF. This time, however, the interfaces monitored instead of controlled the bus.
Figure 7 shows a simplified block diagram of a single signal-conditioning channel on this board. Four such For the Space Shuttle, landing gear loads at vari- channels have been built onto one AIMS-printed cir- ous ground speeds require study. A project has been cuit board. Two of these boards can be installed into initiated to modify a Convair 990 (General Dynamics, one module (Fig. 6) for a total of eight channels. As Convair Division, San Diego, California) to study these technology improves, as many as 16 channels could loads. The mini-TAICS boards will be an integral part be installed in 1 module and still fit the connector of the on-board evaluation and acquisition of loads in- definitions.
formation.
Current Applications Potential Applications The AIMS project is an ambitious one, given the While the thrust of the system design is directed limited resources available. The development person- toward classical instrumentation augmentation, over- nel also have responsibilities in instrumenting active all project requirements make it desirable to use com- flight-research projects. As a result, in moving from mon types of hardware to solve differing problems. The concept to reality, an evolutionary approach is being DFRF personnel have been approached to develop ca- taken. Pieces of the AIMS architecture are being in- pability in interacting with avionics data buses and corporated into existing flight systems to enhance the provide cockpit displays as well as processing power supported flight projects at reduced risk and to test for airborne artificial intelligence applications. Flight the feasibility of this architecture. simulation groups are interested in the system to pro- vide commonality with aircraft systems as well as The DFRF has been flying a small, relatively low- augment their processing capabilities. Flight control processing-power system for some years called the groups have expressed interest in pursuing use of the AICS. A mini-transputer airborne instrumentation transputer because of its potential for addressing fault- computer system (mini-TAICS) processor board has tolerance concerns. In designing the overall system ar- been designed to act as a high-speed, auxiliary pro- chitecture, DFRF personnel have attempted to keep cessor in existing AICS. The inherently distributed these requirements in mind.
architecture of AIMS will allow the transputer AICS to communicate easily with the full-blown AIMS con- Lessons Learned figuration. The mini-TAICS board communicates with the existing system through dual-ported random access Construction of the AIMS involved several design memory (DPRAM) (Fig. 8).
techniques that were new to DFRF instrumentation.
The SMD required new design techniques and testing The first application was designed to support a mechanisms. Liquid cooling required sealing, pressur- NASA project that examined the feasibility of using ization, testing for leaks, and studies of environmen- high-performance jet aircraft to quickly determine the tal impact. Traditional prototyping stages were omit- winds aloft. A mini-TAICS board was built that han- ted because the high-speed circuitry required printed dled most of the on-board computations required for circuits. In addition, the design required integration this Space Shuttle launch-support project. The trans- of digital techniques into analog data acquisition (pro- puter proved to be highly effective in providing the grammable switching).
required information.
Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 A major problem seemed to be finding the balance A MIL-STD-1553 bus interface was built incorpo- between planning and empirical testing. Locking the rating a transputer. This interface combined with the design too early is a mistake. Locking it too late causes mini-TAICS board provided a network of two trans- incompatibilities to arise. Too much planning leads to puters. This combination provided practical expe- lack of perceived progress and too little incurs exces- rience with multiple transputer communications and sive iteration in design cycles. Balancing these needs processing. The application was to act as a MIL-STD- required planning the overall architecture, building the 1553 bus controller for an optical airdata system and pieces, and altering specific definitions until becom- collect data from it for telemetering.
ing reasonably sure that the desired result could be The F-16XL aircraft (General Dynamics, Ft. achieved. The definitions were frozen at that point, Worth, Texas) has a requirement to monitor some and any further changes required strong motivation.
management tech- Facility promises to enhance data Much work remains, but the project has proceeded The development niques for on-board instrumentation.
far enough that DFRF personnel have gained confi- the architecture in exist- goals can be met. Goals already approach of testing pieces of dence that all major are as follows: ing aircraft systems has allowed timely, cost effective met design. Using a high- testing of crucial elements of the the central element of speed, 32-bit microprocessor as • Using parallel processing in distributed processors a parallel-processing architecture allows on-board com- to enhance the management of data. The Interfacing flight-tested interfaces to a transputer putation • small, modular system is designed to allow for remote design processors and signal positioning and programming of in flight to perform real- • Using a transputer board the electronics in conditioning. The option of bathing for real-time display time computations on data an inert fluid allows use in high-temperature environ- ments. The airborne information management system • Defining and fabricating a modular form factor of our airborne data acquisition promises to solve many the 21st century.
and computation requirements into • Using high-density SMD in hardware designed for flight References the viability of a sealed, liquid- • Demonstrating Bever, Glenn, The Development of an Airborne In- filled system NASA strumentation Computer System for Flight Test, TM-86036, 1984.
pro- A printed circuit board that incorporates Hoadley, A. and A. Porter, "Comparison of Im- grammable signal conditioning is currently under test.
Goals still to be demonstrated are as follows: mersed Liquid and Air Cooling of NASA's Airborne Management System," AIAA 92-2901, Information July 1992.
• Complete the programmable signal-conditioning testing 3 A.J. Porter, "Thermal Man- Hoadley, A.W., and agement of Closed Computer Modules Utilizing High form-factor • Test environmentally the AIMS June 1990.
Density Circuitry," AIAA 90-1748, hardware A.W., and A.J. Porter, "Failure Detec- Hoadley, • Use the AIMS form-factor system in a flight- tion of Liquid Cooled Electronics in Sealed Packages," research program 1991.
AIAA 91-1423, June Development and Testing of the Ther- Porter, A.J., Remarks Concluding mal Management Techniques for the Airborne Informa- be- tion Management System, M.S. Thesis, Western Michi- An airborne information management system gan University, 1991.
ing developed at the NASA Dryden Flight Research Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 ' i l EC88 0123-1 FR 12 EC88 0123-1 FR Fig. 2 Disassembled airborne information manage- information management system stack Fig. 1 Airborne ment system module housings.
of three modules.
Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 EC92 05111-1 unit board.
Fig. 3 Airborne information management system central processing 920170 Fig. 4 End view of an airborne information management system module.
~ 1.100 in.~ 0.250 in. 0.500 in:7
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CPU/ Analog Power CPU/1553 Pump module analog module module module module Sealed Fluid gas filling Local expansion module bus pins module (fluid) (air)
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C: w Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 w 1553 CPU Power extension \_ (a) Power stack _/ (a) Power stack ~boards on local bus Harsh environment (c) Four boards (b) Power from on local bus external source 920390 Fig. 5 Sample airborne information management system configurations.
I I onne'ctor 6 Connector 1 Align notch (Note offset from center.)
Z 128 pins on
the local bus lnsen this way.
920391 Fig. 6 An airborne information management system module containing two circuit boards.
1-----------------------------------
Programmable Programmable
--....-1 excitation
offset Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113 Programmable Programmable Programmable 12-blt A-D bridge Sensor antlallaslng gain amplifier convener completion filter Transputer bus 920392 Fig. 7 Analog signal conditioning.
Memory section
------ .... .------
128-KBYTE 256-KBYTE RAM or EPROM static RAM T800 Transputer (high memory) (low memory) 32-blt CPU Link 0 4-KBYTE high- s RAM Link 1 0-Mblt DRAM refresh 32-blt data, 32-bit address serial __ ...,control bus links Address latches Link 2 Data bus drivers Control bus drivers 1-KBYTE Address decode dual-ported static RAM STD bus Interface 56-pln edge connector 4.5- x 7-ln. PC card 920393 Fig. 8 The mini-transputer airborne instrumentation computer system.
Downloaded by NASA LANGLEY RESEARCH CENTER on December 17, 2024 | http://arc.aiaa.org | DOI: 10.2514/6.1992-4113